? semiconductor components industries, llc, 2006 august, 2006 ? rev. 6 1 publication order number: lm337/d lm337 1.5 a, adjustable output, negative voltage regulator the lm337 is an adjustable 3?terminal negative voltage regulator capable of supplying in excess of 1.5 a over an output voltage range of ?1.2 v to ? 37 v. this voltage regulator is exceptionally easy to use and requires only two external resistors to set the output voltage. further, it employs internal current limiting, thermal shutdown and safe area compensation, making it essentially blow?out proof. the lm337 serves a wide variety of applications including local, on card regulation. this device can also be used to make a programmable output regulator, or by connecting a fixed resistor between the adjustment and output, the lm337 can be used as a precision current regulator. features ? output current in excess of 1.5 a ? output adjustable between ?1.2 v and ? 37 v ? internal thermal overload protection ? internal short circuit current limiting constant with temperature ? output transistor safe?area compensation ? floating operation for high voltage applications ? eliminates stocking many fixed voltages ? available in surface mount d 2 pak and standard 3?lead transistor package ? pb?free packages are available standard application v out C1.25v 1 r 2 r 1 *c in is required if regulator is located more than 4 inches from power supply filter. * a 1.0 f solid tantalum or 10 f aluminum electrolytic is recommended. **c o is necessary for stability. a 1.0 f solid tantalum or 10 f aluminum electrolytic ** is recommended. lm337 i prog c in * 1.0 f + ?v in v in v out ?v out c o ** 1.0 f + i adj r 1 120 r 2 three?terminal adjustable negative voltage regulator to?220ab t suffix case 221ab 1 marking diagrams lm 337xx awlywwg pin 1. adjust 2. v in 3. v out heatsink surface connected to pin 2. see detailed ordering and shipping information in the package dimensions section on page 8 of this data sheet. ordering information xx = bt, t yyyy = bd2t, d2t a = assembly location wl = wafer lot y = year ww = work week g = pb?free package http://onsemi.com d 2 pak d2t suffix case 936 heatsink surface (shown as terminal 4 in case outline drawing) is connected to pin 2. 1 lm 337yyyy awlywwg
lm337 http://onsemi.com 2 maximum ratings (t a = +25 c, unless otherwise noted) rating symbol value unit input?output voltage differential v i ?v o 40 vdc power dissipation case 221a t a = +25 c thermal resistance, junction?to?ambient thermal resistance, junction?to?case case 936 (d 2 pak) t a = +25 c thermal resistance, junction?to?ambient thermal resistance, junction?to?case p d ja jc p d ja jc internally limited 65 5.0 internally limited 70 5.0 w c/w c/w w c/w c/w operating junction temperature range t j ?40 to +125 c storage temperature range t stg ?65 to +150 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. electrical characteristics (|v i? v o | = 5.0 v; i o = 0.5 a for t package; t j = t low to t high [note 1]; i max and p max [note 2].) characteristics figure symbol min typ max unit line regulation (note 3), t a = +25 c, 3.0 v |v i ?v o | 40 v 1 reg line ? 0.01 0.04 %/v load regulation (note 3), t a = +25 c, 10 ma i o i max |v o | 5.0 v |v o | 5.0 v 2 reg load ? ? 15 0.3 50 1.0 mv % v o thermal regulation, t a = +25 c (note 5), 10 ms pulse reg therm ? 0.003 0.04 % v o /w adjustment pin current 3 i adj ? 65 100 a adjustment pin current change, 2.5 v |v i ?v o | 40 v, 10 ma i l i max , p d p max , t a = +25 c 1, 2 i adj ? 2.0 5.0 a reference voltage, t a = +25 c, 3.0 v |v i ?v o | 40 v, 10 ma i o i max , p d p max , t j = t low to t high 3 v ref ?1.21 3 ?1.20 ?1.25 0 ?1.25 ?1.28 7 ?1.30 v line regulation (note 3), 3.0 v |v i ?v o | 40 v 1 reg line ? 0.02 0.07 %/v load regulation (note 3), 10 ma i o i max |v o | 5.0 v |v o | 5.0 v 2 reg load ? ? 20 0.3 70 1.5 mv % v o temperature stability (t low t j t high ) 3 t s ? 0.6 ? % v o minimum load current to maintain regulation (|v i ?v o | 10 v) (|v i ?v o | 40 v) 3 i lmin ? ? 1.5 2.5 6.0 10 ma maximum output current |v i ?v o | 15 v, p d p max , t package |v i ?v o | 40 v, p d p max , t j = +25 c, t package 3 i max ? ? 1.5 0.15 2.2 0.4 a rms noise, % of v o , t a = +25 c, 10 hz f 10 khz n ? 0.003 ? % v o ripple rejection, v o = ?10 v, f = 120 hz (note 4) without c adj c adj = 10 f 4 rr ? 66 60 77 ? ? db long?term stability, t j = t high (note 6), t a = +25 c for endpoint measurements 3 s ? 0.3 1.0 %/1.0 k hrs. thermal resistance, junction?to?case, t package r jc ? 4.0 ? c/w 1. t low to t high = 0 to +125 c, for lm337t, d2t. t low to t high = ? 40 to +125 c, for lm337bt, bd2t. 2. i max = 1.5 a, p max = 20 w 3. load and line regulation are specified at constant junction temperature. change in v o because of heating effects is covered under the thermal regulation specification. pulse testing with a low duty cycle is used. 4. c adj , when used, is connected between the adjustment pin and ground. 5. power dissipation within an ic voltage regulator produces a temperature gradient on the die, affecting individual ic componen ts on the die. these effects can be minimized by proper integrated circuit design and layout techniques. thermal regulation is the effect of t hese temperature gradients on the output voltage and is expressed in percentage of output change per watt of power change in a specified time. 6. since long term stability cannot be measured on each device before shipment, this specification is an engineering estimate of average stability from lot to lot.
lm337 http://onsemi.com 3 representative schematic diagram figure 1. line regulation and i adj /line test circuit * v oh v ol lineregulation(% v) |v ol Cv oh | |v oh | x100 lm337 100 2.5k 2.0k 60 810 10k 15pf 800 220 5.0k 75 0 60k 100k 18k 800 4.0k 6.0k 1.0k 9.6k 3.0k 2.2k 100 18k 21k 270 100pf 5.0pf 240 2.0 pf 250 8.0k 20k 100k 5.0k 0.2 15 600 2.9k 4.0k 500 2.4k 15 155 0.05 v in 500 adjust v out 2.0k 25pf 15pf c in 1.0 f r 2 1% c o + r l adjust v in v out r 1 120 1% v ee *pulse testing required. 1% duty cycle is suggested. 1.0 f v ih v il i adj this device contains 39 active transistors. 30k
lm337 http://onsemi.com 4 figure 2. load regulation and i adj /load test circuit figure 3. standard test circuit figure 4. ripple rejection test circuit v o (min load) ? v o (max load) c in 1.0 f r 2 1% r 1 120 c o + r l (max load) adjust v in ?v i lm337 v out *pulse testing required. 1% duty cycle is suggested. load regulation (mv) = v o (min load) ? v o (max load) load regulation (% v o ) = x 100 i l i adj 1.0 f ?v o (min load) ?v o (max load) v o r l + 1.0 f c o r 1 120 1% r 2 c in adjust v in lm337 to calculate r 2 : r 2 = ? 1 r 1 this assumes i adj is negligible. * pulse testing required. * 1% duty cycle is suggested. v i i adj v ref i l v o 1.0 f v out r l + 1.0 f c o 1n4002 d 1 * c in 1% r 2 adjust v in lm337 r 1 120 14.3 v 4.3 v f = 120 hz c adj + v out = ?1.25 v * d 1 discharges c adj if output is shorted to ground. 1.0 f 10 f v out v o * v o (min load) v ref
lm337 http://onsemi.com 5 figure 5. load regulation figure 6. current limit figure 7. adjustment pin current figure 8. dropout voltage figure 9. temperature stability figure 10. minimum operating current v out , output voltage change (%) i l = 0.5 a i l = 1.5 a v in = ?15 v v out = ?10 v i out , output current (a) t j = 25 c , adjustment current ( adj a) i v in out , input?output voltage ? v 1.0 a 500 ma 200 ma 20 ma v out = ?5.0 v v o = 100 mv i l = 1.5 a v ref , reference voltage (v) , quiescent current (ma) b i t j = 25 c differential (vdc) 0.2 0 ?0.2 ?0.4 ?0.6 ?0.8 ?1.0 ?1.2 ?1.4 4.0 3.0 2.0 1.0 0 80 75 70 65 60 55 50 45 40 3.0 2.5 2.0 1.5 1.0 1.27 1.26 1.25 1.24 1.23 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 ?50 ?25 0 25 50 75 100 125 150 t j , junction temperature ( c) 0 10203040 v in ?v out , input?output voltage differential (vdc) ?50 ?25 0 25 50 75 100 125 150 t j , junction temperature ( c) ?50 ?25 0 25 50 75 100 125 150 t j , junction temperature ( c) ?50 ?25 0 25 50 75 100 125 150 t j , junction temperature ( c) 10 20 30 40 0 v in ?v out , input?output voltage differential (vdc)
lm337 http://onsemi.com 6 figure 11. ripple rejection versus output voltage figure 12. ripple rejection versus output curren t figure 13. ripple rejection versus frequency figure 14. output impedance figure 15. line transient response figure 16. load transient response 010203040 t, time ( s) v voltage change (v) in v voltage deviation (v) out , input , output v voltage deviation (v) out i current (a) l , load , output 010203040 t, time ( s) v out = ?10 v i l = 50 ma t j = 25 c c l = 1.0 f without c adj 0 ?5.0 ?10 ?15 ?20 ?25 ?30 ?35 ?40 rr, ripple rejection (db) v out , output voltage (v) 0.01 0.1 1.0 10 rr, ripple rejection (db) i o , output current (a) 10 100 1.0 k 10 k 100 k 1.0 m 10 m rr, ripple rejection (db) f, frequency (hz) 10 100 1.0 k 10 k 100 k 1.0 m , output impedance () o f, frequency (hz) z c adj = 10 f 0.8 0.6 0.4 0.2 0 ?0.2 ?0.4 0 ?0.5 ?1.0 ?0.5 0.6 0.4 0.2 0 ?0.2 ?0.4 ?0.6 0 ?1.0 ?1.5 100 80 60 40 20 0 100 80 60 40 20 0 100 80 60 40 0 20 10 1 10 0 10 ?1 10 ?2 10 ?3 without c adj c adj = 10 f v in = ?15 v v out = ?10 v i l = 50 ma t j = 25 c c l = 1.0 f c adj = 10 f v in ? v out = 5.0 v i l = 500 ma f = 120 hz t j = 25 c without c adj without c adj c adj = 10 f v in = ?15 v v out = ?10 v f = 120 hz t j = 25 c c adj =10 f without c adj v in = ?15 v v out = ?10 v i l = 500 ma t j = 25 c without c adj c adj = 10 f v in = ?15 v v out = ?10 v i l = 500 ma c l = 1.0 f t j = 25 c
lm337 http://onsemi.com 7 applications information basic circuit operation the lm337 is a 3?terminal floating regulator. in operation, the lm337 develops and maintains a nominal ?1.25 v reference (v ref ) between its output and adjustment terminals. this reference voltage is converted to a programming current (i prog ) by r 1 (see figure 17), and this constant current flows through r 2 from ground. the regulated output voltage is given by: v out v ref 1 r 2 r 1 i adj r 2 since the current into the adjustment terminal (i adj ) represents an error term in the equation, the lm337 was designed to control i adj to less than 100 a and keep it constant. to do this, all quiescent operating current is returned to the output terminal. this imposes the requirement for a minimum load current. if the load current is less than this minimum, the output voltage will rise. since the lm337 is a floating regulator, it is only the voltage differential across the circuit which is important to performance, and operation at high voltages with respect to ground is possible. figure 17. basic circuit configuration + ? v out c o r 2 i prog r 1 adjust v in lm337 v out + v ref = ?1.25 v typical v ref v out i adj load regulation the lm337 is capable of providing extremely good load regulation, but a few precautions are needed to obtain maximum performance. for best performance, the programming resistor (r 1 ) should be connected as close to the regulator as possible to minimize line drops which effectively appear in series with the reference, thereby degrading regulation. the ground end of r 2 can be returned near the load ground to provide remote ground sensing and improve load regulation. external capacitors a 1.0 f tantalum input bypass capacitor (c in ) is recommended to reduce the sensitivity to input line impedance. the adjustment terminal may be bypassed to ground to improve ripple rejection. this capacitor (c adj ) prevents ripple from being amplified as the output voltage is increased. a 10 f capacitor should improve ripple rejection about 15 db at 120 hz in a 10 v application. an output capacitance (c o ) in the form of a 1.0 f tantalum or 10 f aluminum electrolytic capacitor is required for stability. protection diodes when external capacitors are used with any ic regulator it is sometimes necessary to add protection diodes to prevent the capacitors from discharging through low current points into the regulator. figure 18 shows the lm337 with the recommended protection diodes for output voltages in excess of ?25 v or high capacitance values (c o > 25 f, c adj > 10 f). diode d 1 prevents c o from discharging thru the ic during an input short circuit. diode d 2 protects against capacitor c adj discharging through the ic during an output short circuit. the combination of diodes d 1 and d 2 prevents c adj from the discharging through the ic during an input short circuit. figure 18. voltage regulator with protection diodes + ? + c in ?v in r 2 c adj + + 1n4002 lm337 v out v out v in d1 1n4002 r 1 d 2 c o adjust v out figure 19. d 2 pak thermal resistance and maximum power dissipation versus p.c.b. copper length r , thermal resistance ja junction-to-air ( c/w) ???? ???? ???? ???? p d , maximum power dissipation (w) 30 40 50 60 70 80 minimum size pad 2.0 oz. copper l l free air mounted vertically r ja 1.0 1.5 2.0 2.5 3.0 3.5 0102030 25 15 5.0 l, length of copper (mm) p d(max) for t a = +50 c
lm337 http://onsemi.com 8 ordering information device operating temperature range package shipping ? lm337bd2t t j = ? 40 to +125 c d 2 pak 50 units / rail lm337bd2tg d 2 pak (pb?free) lm337bd2tr4 d 2 pak 800 / tape & reel LM337BD2TR4G d 2 pak (pb?free) lm337bt to?220ab 50 units / rail lm337btg to?220ab (pb?free) lm337d2t t j = 0 to +125 c d 2 pak lm337d2tg d 2 pak (pb?free) lm337d2tr4 d 2 pak 800 / tape & reel lm337d2tr4g d 2 pak (pb?free) lm337t to?220ab 50 units / rail lm337tg to?220ab (pb?free) ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
lm337 http://onsemi.com 9 package dimensions d2t suffix case 936?03 (d 2 pak) issue b 5 ref 5 ref a 12 3 k f b j s h 0.010 (0.254) t m d g c e ?t ? m l p n r v u terminal 4 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. tab contour optional within dimensions a and k. 4. dimensions u and v establish a minimum mounting surface for terminal 4. 5. dimensions a and b do not include mold flash or gate protrusions. mold flash and gate protrusions not to exceed 0.025 (0.635) maximum. dim a min max min max millimeters 0.386 0.403 9.804 10.236 inches b 0.356 0.368 9.042 9.347 c 0.170 0.180 4.318 4.572 d 0.026 0.036 0.660 0.914 e 0.045 0.055 1.143 1.397 f 0.051 ref 1.295 ref g 0.100 bsc 2.540 bsc h 0.539 0.579 13.691 14.707 j 0.125 max 3.175 max k 0.050 ref 1.270 ref l 0.000 0.010 0.000 0.254 m 0.088 0.102 2.235 2.591 n 0.018 0.026 0.457 0.660 p 0.058 0.078 1.473 1.981 r s 0.116 ref 2.946 ref u 0.200 min 5.080 min v 0.250 min 6.350 min optional chamfer 8.38 0.33 1.016 0.04 17.02 0.67 10.66 0.42 3.05 0.12 5.08 0.20 mm inches scale 3:1 *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint*
lm337 http://onsemi.com 10 package dimensions to?220, single gauge t suffix case 221ab?01 issue o notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension z defines a zone where all body and lead irregularities are allowed. dim min max min max millimeters inches a 0.570 0.620 14.48 15.75 b 0.380 0.405 9.66 10.28 c 0.160 0.190 4.07 4.82 d 0.025 0.035 0.64 0.88 f 0.142 0.147 3.61 3.73 g 0.095 0.105 2.42 2.66 h 0.110 0.155 2.80 3.93 j 0.018 0.025 0.46 0.64 k 0.500 0.562 12.70 14.27 l 0.045 0.060 1.15 1.52 n 0.190 0.210 4.83 5.33 q 0.100 0.120 2.54 3.04 r 0.080 0.110 2.04 2.79 s 0.020 0.055 0.508 1.39 t 0.235 0.255 5.97 6.47 u 0.000 0.050 0.00 1.27 v 0.045 ??? 1.15 ??? z ??? 0.080 ??? 2.04 b q h z l v g n a k f 123 4 d seating plane ?t? c s t u r j on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, r epresentation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. lm337/d publication ordering information n. american technical support : 800?282?9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81?3?5773?3850 literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
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